Fysetc pins updates for RAMPS and SKR 1.3 (#13963)
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@@ -207,10 +207,13 @@
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#if ENABLED(FYSETC_MINI_12864)
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#define DOGLCD_CS P1_18
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#define DOGLCD_A0 P1_19
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#define DOGLCD_SCK P0_15
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#define DOGLCD_MOSI P0_18
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#define FORCE_SOFT_SPI
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#define LCD_BACKLIGHT_PIN -1
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//#define FORCE_SOFT_SPI // Use this if default of hardware SPI causes display problems
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#define FORCE_SOFT_SPI // Use this if default of hardware SPI causes display problems
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// results in LCD soft SPI mode 3, SD soft SPI mode 0
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#define LCD_RESET_PIN P1_20 // Must be high or open for LCD to operate normally.
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